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Package: 20CDIP
Bus Hold: No
Mounting: Through Hole
Polarity: Non-Inverting
Rad Hard: 0
Pin Count: 20
Set/Reset: Master Reset
Logic Family: FCT
Logic Function: D-Type
Screening Level: Military
Triggering Type: Positive-Edge
Supplier Package: CDIP
Input Signal Type: Single-Ended
Output Signal Type: Single-Ended
Operating Temperature: -55 to 125 °C
Number of Element Inputs: 8
Maximum Quiescent Current: 2 mA
Number of Element Outputs: 8
Number of Channels per Chip: 8
Number of Elements per Chip: 1
Propagation Delay Test Condition: 50 pF
Typical Operating Supply Voltage: 5.0000 V
Maximum High Level Output Current: -12 mA
Maximum Propagation Delay Time @ Maximum CL: 15@4.5V ns
